Staff Engineer, Coherent Interconnect Design Verification job opportunity at Samsung.

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DateMore Than 30 Days Ago bot
Samsung Staff Engineer, Coherent Interconnect Design Verification
Experience: 6-years
Pattern: full-time
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Coherent Interconnect Design Verification

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loacation 3900 N Capital of Texas Hwy, Austin, TX, USA, United States Of America
loacation 3900 N Capital..........United States Of America

Position Summary Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy – the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us! Role and Responsibilities As a Staff Design Verification Engineer, you will help lead the functional verification of System IP—including coherent interconnects, caches— through hands-on project execution. This high-impact individual contributor role requires strong expertise in design verification, testbench architecture, and methodologies across both block- and top-level environments. You will help define verification strategy, drive best practices, and ensure timely milestone execution in collaboration with global cross-functional teams to advance Samsung’s cutting-edge coherent interconnect IPs that power next-generation consumer mobile products. You ensure design excellence and thorough verification by contributing to key features, driving test planning, verifying design feature accuracy, and performing coverage analysis to identify improvement opportunities. You will develop reusable verification environments and testbenches, including stimulus, assertions, checkers, covergroups, and SystemVerilog constraints. You debug and root cause functional fails from regressions, and help with Silicon debug You perform coverage gap analysis, identifying coverage exclusions and improving stimulus You will be a key player in test plan and code reviews You will contribute to power-aware verification with UPF and gate-level simulations. You collaborative with design, SoC, physical design, and performance verification teams to debug failures, resolve spec issues, and enable successful bring-up across IP, SoC, and silicon. You exemplify an ownership culture and inspire an inclusive, high-performing culture by mentoring junior engineers, fostering trust, and data-driven decision-making through open communications. Skills and Qualifications 6+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 4+ years of experience with a Master’s degree, or 2+ years of experience with a PhD. Must have experience with Interconnect Proficiency in ARM protocols – CHI/AXI/ACElite, APB Expert hands-on coding skills in System Verilog, UVM Experience with Git version control, Unix/Perl scripting Excellent communication and collaboration skills, with the ability to navigate ambiguity in a fast-paced, global team environment. Our Team The System IP & SoC Architecture team at SARC/ACL designs proprietary coherent interconnects and memory controllers that power Exynos SoCs for Samsung’s premium consumer devices. We play a critical role in shaping the technology roadmap, delivering scalable, performance- and power-optimized IP solutions that support advanced system modeling and real-world applications such as gaming and computational photography. With scalability and efficiency at the core of our designs, our IP integrates seamlessly into complex semiconductor products, enabling cutting-edge memory subsystem capabilities across diverse market segments. Joining our team means collaborating alongside talented engineers from diverse technical backgrounds across a global organization. You’ll have the opportunity to build next-generation technologies, broaden your expertise, and solve impactful challenges in a supportive environment built on collaboration, continuous learning, and growth. Total Rewards At Samsung – SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $151,000 and $226,600. Your actual base pay will depend on variables that may include your education skills, qualifications, experience, and work location. Samsung employees have access to benefits including: medical, dental, vision, life insurance, 401(k), onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more. In addition, regular full-time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance. Additionally, this role might be eligible to participate in long term incentive plan and relocation. This is an exempt position, which is not eligible for overtime pay under the Fair Labor Standards Act (FLSA). U.S. Export Control This position requires the ability to access information subject to U.S. export control restrictions.  Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information. Trade Secrets By submitting an application, you [applicant] agree[s] not to disclose to Samsung, or induce Samsung to use, any confidential or proprietary information (including trade secrets) belonging to any current or previous employer or other person or entity. #SARC #ACL * Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here . * Samsung Electronics America, Inc. and its subsidiaries are committed to employing a diverse workforce, and  provide Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

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