Analog Design Engineer - CMOS Image Sensors job opportunity at Samsung.

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DatePosted 30+ Days Ago bot
Samsung Analog Design Engineer - CMOS Image Sensors
Experience: 11-years
Pattern: full-time
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Position Summary Position: Analog Design Engineer - CMOS Image Sensors Team: Sensor About Samsung Semiconductor India Research (SSIR) With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more. As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products. Role and Responsibilities Roles and Responsibilities Samsung is a lead provider of CMOS image sensors for mobile and automotive markets. Samsung Semiconductor India R&D (SSIR) is responsible for end-to-end sensor SoC design, firmware and solutions including algorithm optimizations on application processor for mobile products. Role and Responsibilities At least 6 to 11 years circuit design experience on commercialized chips . Analog circuit design expertise, such as ADC, DAC, PLL, Charge Pump, LDO and BGR . Solid leadership experience leading circuit designers, demonstrating excellent engineering judgment. . Solid knowledge of deep submicron process and circuit design issues, design for manufacturability and reliability issues . Expertise in chip design flows (EMIR/Noise), tools and overall methodologies, IP integration, library cells, lvs, drc. . Design experience of Full Chip is good to have . Should be able to work in a dynamic environment with multiple products & product lines. Experience – 6 to 11 years Qualifications B.Tech/B.E/M.Tech/M.E Disclaimer Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law. Skills and Qualifications * Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here .

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