Senior ASIC Design Engineer job opportunity at NVIDIA.

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DatePosted 10 Days Ago bot
NVIDIA Senior ASIC Design Engineer
Experience: 5-years
Pattern: full-time
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degreePhD
loacation US, CA, Santa Clara, United States Of America
loacation US, CA, Santa ..........United States Of America

NVIDIA is looking for a Senior ASIC Design Engineer to join our Memory Subsystem Team!   As a Senior ASIC Design engineer at NVIDIA, you'll join a group of hard-working engineers to design and implement innovative coherent fabrics for our Tegra SoCs. In this position, you'll make a real impact in a dynamic, technology-focused company. Your work will impact product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We've crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the computing platforms of tomorrow. What you'll be doing : As a member of our Memory Subsystem Design team, you will collaborate with architects/design verification/formal verification/physical design team to deliver a world-class solution. NVIDIA SOC Interconnects are among the industry's most sophisticated because of the complex area, latency, power, bandwidth and quality-of-service requirements. In this position, you will have the opportunity to be responsible for the micro-architecture and design including RTL design, synthesis and timing analysis using innovative CAD tools and using the latest process technologies.   What we need to see: MS/Phd in Electrical Engineering or Computer Engineer or related degree (or equivalent experience). 5+ years of relevant industry experience and a background in high-speed coherent interconnects, protocol bridges, hardware-managed coherency and system level caches. Experience with multiple clock domains and asynchronous interfaces Knowledge of industry specifications like CHI/CXL/PCI-E is a plus. Experience with all stages in the ASIC design flow including emulation, prototyping, DFT, timing analysis, floor planning, ECO, bringup & lab debug, and ATE test development. Strong working knowledge of Verilog or VHDL. Scripting language like PERL. Good communication skills and interpersonal skills are required. A history of mentoring junior engineers and interns is a plus.   NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of constant innovation and creating the highest performance products in the industry? If so, we want to hear from you. #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits . Applications for this job will be accepted at least until February 23, 2026. This posting is for an existing vacancy.  NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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