Senior SOC Design Engineer job opportunity at NVIDIA.

Home Jobs In United States Of America Tag: Job Senior SOC Design Engineer position at NVIDIA


DatePosted 9 Days Ago bot
NVIDIA Senior SOC Design Engineer
Experience: 3-years
Pattern: full-time
Country:
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeGeneral
loacation US, CA, Santa Clara, United States Of America
loacation US, CA, Santa ..........United States Of America

NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate with brilliant minds to build cutting-edge GPUs and SOCs that power everything from AI to gaming! As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software, DFT, and more. Our ASICs pack hundreds of billions of transistors—pushing the boundaries of performance and sustainability. If you're passionate about automation, efficiency, and making a real impact, NVIDIA SOC Design team is the place to amplify your creativity and accelerate your career. From pioneering the GPU in 1999—sparking the PC gaming revolution and redefining computer graphics—to leading the charge in AI and deep learning, we are always pushing boundaries." We're a "learning machine," constantly evolving to solve new challenges and seize opportunities that make a real difference. If you're driven by innovation and want to be part of a team that's shaping the future, NVIDIA is where your impact will be felt! What you'll be doing: Integrate diverse IP blocks to build NVIDIA’s next-generation GPUs and SOCs Develop and refine system-level methodologies and tools for efficient SOC creation Streamline SOC design and assembly through innovative integration efforts Spot inefficiencies in the front-end chip implementation process and propose actionable improvements Ensure high-quality RTL delivery to the physical design team with thorough design quality checks and reviews Collaborate across teams to drive standard methodologies and continuous improvement in SOC development   What we need to see: BS or MS in Computer Engineering, Electrical Engineering, or equivalent experience 3+ years of hands-on chip design experience, with a focus on SOC integration and automation Strong analytical and problem-solving skills Expertise in RTL design, SOC integration, and design automation flows Proficiency in Perl, Python, or similar scripting languages Excellent communication and teamwork abilities to build consensus within and across teams Experience in synthesis, padring, and physical design is a plus Ways to stand out from the crowd: Led SOC automation initiatives that significantly boosted efficiency or quality Hands-on expertise with industry-standard EDA tools and flows, especially for large-scale SOC integration Experience mentoring junior engineers or leading cross-functional technical projects NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the most sophisticated chips in the world? If so, we want to hear from you. #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits . Applications for this job will be accepted at least until February 24, 2026. This posting is for an existing vacancy.  NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Other Ai Matches

Senior C++ Software Engineer - Chip Design Tools Applicants are expected to have a solid experience in handling Job related tasks
remote-jobserver Remote
Senior Formal Verification Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Physical Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Software Engineer, AI Resiliency Applicants are expected to have a solid experience in handling AI Resiliency related tasks
remote-jobserver Remote
Senior Solutions Architect, AdTech and Media Applicants are expected to have a solid experience in handling AdTech and Media related tasks
System Debug Lead Engineer Applicants are expected to have a solid experience in handling Job related tasks
Full-stack Software Engineer – Web Infrastructure Applicants are expected to have a solid experience in handling Job related tasks
Principal Storage Kernel Software Engineer, Linux - DGX Cloud Applicants are expected to have a solid experience in handling Linux - DGX Cloud related tasks
Senior Accelerated Computing GPU Product Manager Applicants are expected to have a solid experience in handling Job related tasks
Senior Systems Engineer, Artificial Intelligence Operations Applicants are expected to have a solid experience in handling Artificial Intelligence Operations related tasks
Senior Software Engineer, Profiling Services Applicants are expected to have a solid experience in handling Profiling Services related tasks
Senior System Architect  Applicants are expected to have a solid experience in handling Job related tasks
Senior 3D Modeler and Asset Prep Artist Applicants are expected to have a solid experience in handling Job related tasks
Senior Full-Stack Software Engineer - VLSI Tools Applicants are expected to have a solid experience in handling Job related tasks
Senior Product Marketing Manager, CUDA-X Libraries Applicants are expected to have a solid experience in handling CUDA-X Libraries related tasks
Physical Design Backend Engineer Applicants are expected to have a solid experience in handling Job related tasks
Developer Relations Manager, CAE Higher Education and Research Applicants are expected to have a solid experience in handling CAE Higher Education and Research related tasks
Senior PCB Design Layout Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior GPU Power Architect Applicants are expected to have a solid experience in handling Job related tasks
Cluster Deployment Operations Engineer - NVIS Applicants are expected to have a solid experience in handling Job related tasks
Lead Speed and Reliability Engineer - DFP Applicants are expected to have a solid experience in handling Job related tasks
Physical Design Backend Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior AI Software Development Engineer, TensorRT-LLM Applicants are expected to have a solid experience in handling TensorRT-LLM related tasks