CPU Pre-Silicon Verification Engineer job opportunity at Intel.

Home Jobs In Mexico Tag: Job CPU Pre-Silicon Verification Engineer position at Intel


DateMore Than 30 Days Ago bot
Intel CPU Pre-Silicon Verification Engineer
Experience: 5-years
Pattern: full-time
Country:
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeOND
loacation Mexico, Guadalajara, Mexico
loacation Mexico, Guadal..........Mexico

Job Details: Job Description:  This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position. We are seeking a highly motivated and experienced Senior CPU Pre-Silicon Verification Engineer to join our advanced CPU verification team. In this role, you will be responsible for ensuring the functional correctness and robustness of CPU logic designs through state ‑ of ‑ the ‑ art pre ‑ silicon verification methodologies. You will work closely with microarchitecture, design, and post ‑ silicon teams to help deliver high ‑ performance, power ‑ efficient, and reliable CPU IP. Key Responsibilities: Lead and execute pre ‑ silicon functional verification of complex CPU microarchitecture blocks and top ‑ level subsystems, ensuring correctness against architectural and microarchitectural specifications. Develop, own, and maintain comprehensive verification and test plans, including corner cases, stress scenarios, and detailed coverage goals. Architect, build, and enhance scalable UVM ‑ based (or similar) constrained ‑ random verification environments, including reusable testbenches, agents, sequences, checkers, and scoreboards. Define and implement advanced functional, code, and assertion coverage models, driving systematic coverage ‑ driven closure. Implement high ‑ quality stimulus and assertion ‑ based verification (SVA) to validate complex logic behaviors and corner ‑ case interactions. Execute block ‑ level and system ‑ level simulations to uncover design bugs, integration issues, and functional inconsistencies. Debug complex RTL and testbench failures, performing thorough root ‑ cause analysis using simulation tools, waveforms, formal methods, and collaboration with designers. Work closely with CPU architects and RTL designers to validate intricate architectural and microarchitectural features, review specifications, identify verification risks, and propose design or methodology improvements. Drive technical reviews and document verification strategies, methodologies, and results, ensuring alignment across architecture, design, and verification teams. Enhance verification infrastructure and methodologies, enabling higher automation, scalability, and productivity across the team. Mentor junior engineers and contribute to best ‑ practice development, methodology refinement, and tool ‑ flow improvements. Support related activities, including performance modeling, formal verification, emulation, and prototyping, as needed for overall CPU validation. Qualifications: Minimum qualifications are required to be initially considered for this position.  Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelor's degree or higher in Electrical/Electronic Engineering or Computer Engineering 5+ years or Master's degree with 3+ years. Experience should be in the following areas: Digital logic design, including instruction set execution, ALUs, control units, registers, memory, and system buses. At least one scripting language (e.g., Python, Perl, or Tcl), C++, and SystemVerilog. Analytical and debugging skills, with a creative approach to problem-solving. Advanced English level. Must have unrestricted - permanent right to work in Mexico Preferred Qualifications: Synopsys simulators. Hands-on experience developing UVM-based testbenches for reusable and scalable verification environments. Define and implement validation strategies based on architectural and design insights.            Job Type: Experienced Hire Shift: Shift 1 (Mexico) Primary Location:  Mexico, Guadalajara Additional Locations: Business group: The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Other Ai Matches

APTM NPI Integrator Applicants are expected to have a solid experience in handling Job related tasks
Sr. Infrastructure Engineer Applicants are expected to have a solid experience in handling Job related tasks
Software Automation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Design Verification Engineering Intern Applicants are expected to have a solid experience in handling Job related tasks
System Modeling and Specification Definition Student Applicants are expected to have a solid experience in handling Job related tasks
Director-Foundry Business Development Applicants are expected to have a solid experience in handling Job related tasks
SOC Functional Validation Engineer Applicants are expected to have a solid experience in handling Job related tasks
High-Speed I/O PHY Architect Applicants are expected to have a solid experience in handling Job related tasks
Lead DFT Design Engineer. Applicants are expected to have a solid experience in handling Job related tasks
Optical Sub-System Architect – Principal Engineer Applicants are expected to have a solid experience in handling Job related tasks
Equipment Engineer Applicants are expected to have a solid experience in handling Job related tasks
Semiconductor Device Modeling Engineer Applicants are expected to have a solid experience in handling Job related tasks
Group Counsel, Datacenter and AI Legal Applicants are expected to have a solid experience in handling Datacenter and AI Legal related tasks
WiFi System Integration Team Lead Applicants are expected to have a solid experience in handling Job related tasks
Memory Electrical Validation Engineer Applicants are expected to have a solid experience in handling Job related tasks
APTM NPI Integrator Applicants are expected to have a solid experience in handling Job related tasks
Platform Validation Engineer Intern Applicants are expected to have a solid experience in handling Job related tasks
Senior Post Silicon DFT Engineer Applicants are expected to have a solid experience in handling Job related tasks
DTCO Systems Analysis Engineer - Memory Applicants are expected to have a solid experience in handling Job related tasks
Senior Performance Architect Applicants are expected to have a solid experience in handling Job related tasks
Module Development Engineering Manager Applicants are expected to have a solid experience in handling Job related tasks
Site Operations Specialist Applicants are expected to have a solid experience in handling Job related tasks
Foundry Technology Manufacturing - Senior Process Engineer - Dry Etch (Oregon or Arizona) Applicants are expected to have a solid experience in handling Job related tasks