Atom CPU Layout Design Engineer job opportunity at Intel.



DateMore Than 30 Days Ago bot
Intel Atom CPU Layout Design Engineer
Experience: 1-years
Pattern: full-time
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loacation Mexico, Guadalajara, Mexico
loacation Mexico, Guadal..........Mexico

Job Details: Job Description:  You will be part of a team participating in the design of a future generation high performance Intel Atom microprocessors. Also, you will drive physical implementation for a range of memory compilers, custom IPs, and partitions in support of CPU products. The work is performed with broadly defined parameters and assignments are often complex and nonstandard in nature. Your responsibilities will include but not be limited to: Ensure all designs are following the best practices and are highly efficient. Independently perform and drive complex physical design assignments. Work closely with circuit design engineers to interpret schematics and drive physical implementation. Experience ranging from leaf level cell design to integration is desired. Collaborate closely with other SoC projects at various sites across Intel. Willingness to develop layout scripts macros and solutions is a plus. The ideal candidate should exhibit the following behavioral traits: Excellent communication and interpersonal skills. Prioritization and multitasking skills. Good analytical and problem-solving skills. Qualifications: Minimum qualifications are required to be initially considered for this position, Candidate must possess a bachelor’s in electronic, Microelectronic Engineering, Computer Engineering, or a related engineering discipline. 6+ months of experience in Layout design. Advanced English level. Must have unrestricted – permanent right to work in Mexico. This position is for Guadalajara location only. Relocation is not approved. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates, Master's degree in electronic/Microelectronic Engineering, Computer Engineering, or a related engineering discipline. 1+ year of experience or familiarity with Very Large Scale of Integration (VLSI) and Complementary Metal-Oxide-Semiconductor (CMOS) logic circuit design. 1+ year of knowledge in Unix/Linux operating systems.vcg cxzazxcV CXSAZ Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.            Job Type: Experienced Hire Shift: Shift 1 (Mexico) Primary Location:  Mexico, Guadalajara Additional Locations: Business group: The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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