Electrical Validation Engineering Grad Intern job opportunity at Intel.

Home Jobs In Mexico Tag: Job Electrical Validation Engineering Grad Intern position at Intel


DatePosted 27 Days Ago bot
Intel Electrical Validation Engineering Grad Intern
Experience: General
Pattern: full-time
Country:
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeOND
loacation Mexico, Guadalajara, Mexico
loacation Mexico, Guadal..........Mexico

Job Details: Job Description:  This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position. As an Electrical Validation Engineering Graduate Intern, you will join a dynamic and innovative team responsible for supporting the electrical validation of cutting-edge server datacenter products, with a focus on memory I/O technologies. In this role, you will contribute to both pre ‑ silicon and post ‑ silicon validation activities, ensuring robust design, comprehensive test coverage, and world ‑ class product quality. Your work will directly impact Intel’s next ‑ generation datacenter solutions by helping deliver reliable, high ‑ performance products to customers. Key Responsibilities Pre ‑ Silicon Validation: Develop, write, and simulate analog test content at both IP and full ‑ chip levels. Validate test methodology and ensure test content is robust, efficient, and aligned with design requirements. Post ‑ Silicon Debug & Characterization Perform silicon debug to identify, isolate, and root ‑ cause electrical bugs. Conduct detailed silicon characterization to validate memory I/O performance and electrical behavior. Cross ‑ Team Collaboration Work closely with platform and system ‑ level validation teams to identify, reproduce, and close silicon issues. Collaborate with global cross ‑ functional teams—including design, validation, firmware, manufacturing, and product engineering—to support end ‑ to ‑ end product development. Behavioral traits: Use methodological approaches to solve highly complex problems Written and verbal communication skills Multitask and work in a dynamic and team oriented environment Through this assignment, you can expect to gain industry level experience in the following areas: DDR memory IO validation Design for Test, hardware testing methods and tools Qualifications: Minimum qualifications are required to be initially considered for this position.  Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications: Currently pursuing an Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field. 3 months of experience in: Hardware architecture, logic/circuit design and implementation. Hardware/Programming languages: Python, C, C++, etc. High speed circuit testing (oscilloscope and JBERT usage, etc). Advance English level. Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship). Preferred Qualifications: Experience with post ‑ silicon debug workflows or electrical characterization. If you are ready to gain hands-on experience, grow your skills, and make a meaningful impact, we encourage you to apply and start your journey with Intel.            A candidate who accepts an offer of employment in Mexico is required to present their own personal identification information and numbers for the following: Mexican Security Number (NSS), Tax Identification Number (RFC) and CURP identification number.            Job Type: Student / Intern Shift: Shift 1 (Mexico) Primary Location:  Mexico, Guadalajara Additional Locations: Business group: At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Other Ai Matches

TCAD Machine Learning Engineer Applicants are expected to have a solid experience in handling Job related tasks
SoC Functional Validation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Sr. Infrastructure Engineer – Storage Applicants are expected to have a solid experience in handling Job related tasks
Supply Chain Engineer Applicants are expected to have a solid experience in handling Job related tasks
Materials Program Manager Intern Applicants are expected to have a solid experience in handling Job related tasks
GPU SOC Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Director - Foundry Business Development Applicants are expected to have a solid experience in handling Job related tasks
Graduate Talent (MPE DDG) Applicants are expected to have a solid experience in handling Job related tasks
Automation Software Development Integration Engineer Applicants are expected to have a solid experience in handling Job related tasks
APTM NPI Integrator Applicants are expected to have a solid experience in handling Job related tasks
Packaging Module Process Development Engineer Applicants are expected to have a solid experience in handling Job related tasks
Human Resources Management Systems Analyst Applicants are expected to have a solid experience in handling Job related tasks
Senior Design Engineer – AI SoC Development Applicants are expected to have a solid experience in handling Job related tasks
Security Architect Applicants are expected to have a solid experience in handling Job related tasks
Physical Design (Backend) Technical Leader Applicants are expected to have a solid experience in handling Job related tasks
Senior Design Engineer - Chassis Foundation IP Applicants are expected to have a solid experience in handling Job related tasks
Engineer Technician Applicants are expected to have a solid experience in handling Job related tasks
Platform FW and AI application Engineer- Intern Applicants are expected to have a solid experience in handling Job related tasks
Power and Performance Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Compiler Engineer Applicants are expected to have a solid experience in handling Job related tasks
GPU SOC Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Layout Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Silicon Design Engineering Manager – AI SoC Deployment Applicants are expected to have a solid experience in handling Job related tasks