System Modeling and Specification Definition Student job opportunity at Intel.



DatePosted 25 Days Ago bot
Intel System Modeling and Specification Definition Student
Experience: General
Pattern: part-time
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeOND
loacation Israel, Petah-Tikva, Israel
loacation Israel, Petah-..........Israel

Job Details: Job Description:  Join Intel’s Wireless Connectivity Solutions Group as a System Modeling & Specification MSc Student and help shape the next generation of Wi‑Fi and Bluetooth SoCs. In this role, you will develop system‑level models for advanced analog and mixed‑signal blocks, explore architectural tradeoffs through simulation and research, and contribute to early specification definition. You will work closely with leading architects and designers while leveraging AI‑assisted tools to accelerate analysis, modeling, and technical exploration—gaining hands‑on experience at the intersection of circuits, systems, and intelligent workflows. System Modeling & Specification Student (MSc) Intel Wireless Connectivity Solutions Group – Circuit/System Team Intel’s Wireless Connectivity Solutions Group delivers industry‑leading Wi‑Fi and Bluetooth products across the PC ecosystem. The Circuit/System team is responsible for defining and architecting the analog, power delivery, and high‑speed SerDes building blocks that form the foundation of Intel’s next‑generation wireless SoCs. We are seeking a highly motivated Master’s student to support system‑level modeling and specification definition of advanced analog and mixed‑signal components. This role is ideal for a curious and analytical student who enjoys deep technical research, system thinking, and early architectural influence, and who is interested in applying AI‑assisted workflows as part of modern engineering practice. Key Responsibilities Develop and maintain system‑level models for analog and mixed‑signal blocks, including Power Delivery and High‑Speed SerDes. Perform analytical and behavioral simulations (e.g., MATLAB, Python) to explore architectural tradeoffs and guide design decisions. Conduct technical research and literature review , using AI‑assisted tools to accelerate analysis and insight generation. Work with system architects, analog designers, and cross‑functional teams to define clear, implementable block‑level specifications . Analyze measurement data and platform behaviors to validate and refine models . Apply AI‑based and automated workflows to improve modeling efficiency, exploration, and documentation. Participate in system discussions bridging circuit‑level behavior and system‑level requirements . Qualifications: MSc student in Electrical Engineering, Computer Engineering, or a related field ( at least 3 semesters remaining ). Strong fundamentals in analog/mixed‑signal circuits and system behavior. Experience with MATLAB, Python, C/C++, or similar modeling environments . Strong analytical thinking, curiosity, and research skills. Ability to collaborate and communicate effectively in a multidisciplinary team . Interest in leveraging AI‑assisted analysis, modeling, and automation tools . Nice to Have Coursework or background in Power Delivery, SerDes, or high‑speed circuits . Experience with behavioral or system‑level modeling . Familiarity with wireless systems (Wi‑Fi, Bluetooth). Scripting and automation experience. Understanding of architectural tradeoffs such as noise, jitter, power integrity, and channel effects.            Job Type: Student / Intern Shift: Shift 1 (Israel) Primary Location:  Israel, Petah-Tikva Additional Locations: Israel, Haifa Business group: The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. *

Other Ai Matches

Senior Physical Design Application Engineer Applicants are expected to have a solid experience in handling Job related tasks
Module Engineer (Contract Role) Applicants are expected to have a solid experience in handling Job related tasks
Rebate Global Process Owner Analyst Applicants are expected to have a solid experience in handling Job related tasks
Identity Security Engineer Applicants are expected to have a solid experience in handling Job related tasks
Business Strategist – Media & Entertainment Applicants are expected to have a solid experience in handling Job related tasks
GPU SOC Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Compiler Engineer Applicants are expected to have a solid experience in handling Job related tasks
APTM NPI Integrator Applicants are expected to have a solid experience in handling Job related tasks
Senior Pre-Silicon Verification Engineer Applicants are expected to have a solid experience in handling Job related tasks
Low Yield Analysis Engineer Applicants are expected to have a solid experience in handling Job related tasks
Graduate Talent (MPE DDG) Applicants are expected to have a solid experience in handling Job related tasks
CPU Core Timing and Automation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Platform Validation Engineer Intern Applicants are expected to have a solid experience in handling Job related tasks
Senior Design Engineer – AI SoC Development Applicants are expected to have a solid experience in handling Job related tasks
Executive Administrative Assistant to the Chief Marketing and Communications Officer Applicants are expected to have a solid experience in handling Job related tasks
Senior DFT Engineer Applicants are expected to have a solid experience in handling Job related tasks
Server Platform Validation Architect Applicants are expected to have a solid experience in handling Job related tasks
Logistics Operations Manager Applicants are expected to have a solid experience in handling Job related tasks
Security Researcher Applicants are expected to have a solid experience in handling Job related tasks
WiFi System Integration Team Lead Applicants are expected to have a solid experience in handling Job related tasks
Graduate Talent (Development Tools Software Engineer) Applicants are expected to have a solid experience in handling Job related tasks
Software Automation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Silicon Design Engineering Manager – AI SoC Deployment Applicants are expected to have a solid experience in handling Job related tasks