Staff Validation Engineer job opportunity at Marvell Technology, Inc..

Home Jobs In United States Of America Tag: Job Staff Validation Engineer position at Marvell Technology, Inc.


bot
Marvell Technology, Inc. Staff Validation Engineer
Experience: 5-years
Pattern: full-time
Country:
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeOND
loacation Santa Clara, CA, United States Of America
loacation Santa Clara, C..........United States Of America

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact As a Hardware and Silicon Validation Staff Engineer at Marvell, you’ll be helping to deliver high bandwidth over long distances. This team performs analog validations on amplifiers that drive optical electronic devices and receivers. We also validate silicon photonics, do upper electronic measurements and support the coherent digital signal programming unit. This is a niche area at Marvell, working with cutting edge technologies used by many internal and external customers around the world. What You Can Expect Represent system engineering team while engaging with functional teams (such as digital, analog, firmware) to develop Marvell’s next gen, high-speed networking PHY Serdes IP/ICs. Work independently and collaboratively in post-silicon validation team to collect and  analyze massive bench  data and drive tuning parameters to ensure product quality. Characterize electrical parameters and building blocks such as Tx jitters, CDR loops, CTLE, PLL, etc. Tune internal circuits  such as peaking, bandwidth, FIFO, and adaptation algorithms to optimize product’s operating margin under  stressed PVT conditions. Involve in system level hardware (PCB schematics) and work with SI and layout teams to build engineering boards. Create, maintain and own bench automation libraries (python) for various of products. Share your ideas and contribute work that will have a direct impact upon  the product of company. What We're Looking For Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 3-5 years of related professional experience OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2-3 years of experience. Strong analog and  mixed-signal knowledge. Solid understanding of modern high-speed PHY/Serdes. Solid programming skill in languages such as Python, Matlab, etc. Strong team work and communication skills. Demonstrates good analysis and problem-solving skills. Expected Base Pay Range (USD) 102,880 - 154,100, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements   At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com . Interview Integrity   As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.   Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-NF1

Other Ai Matches

Senior Silicon Validation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Staff Engineer- Analog Design Applicants are expected to have a solid experience in handling Job related tasks
Firmware Engineering Intern - Bachelor's Degree (Winter 2026 Start Date) Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff Engineer, Analog Layout Applicants are expected to have a solid experience in handling Analog Layout related tasks
Digital IC Design Intern (Connectivity) Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff Engineer, Optical Applicants are expected to have a solid experience in handling Optical related tasks
Senior Staff Optical Packaging Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Digital Design Engineer, Principal Applicants are expected to have a solid experience in handling Principal related tasks
Architecture DSP Intern - PhD Applicants are expected to have a solid experience in handling Job related tasks
Staff Physical Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff Engineer, Physical Design Applicants are expected to have a solid experience in handling Physical Design related tasks
Principle Verification Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff Verification Engineer Applicants are expected to have a solid experience in handling Job related tasks
Product Engineer Intern - (Network & Connectivity) Applicants are expected to have a solid experience in handling Job related tasks
Application Engineer Intern - Master's Degree (RDSS 2026) Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff CAD Engineer Applicants are expected to have a solid experience in handling Job related tasks
Digital Design (Senior to Senior Staff level) Applicants are expected to have a solid experience in handling Job related tasks
Hardware Validation (Test Solutions) Engineer Applicants are expected to have a solid experience in handling Job related tasks
Sr. Principal Engineer, Advanced Packaging Applicants are expected to have a solid experience in handling Advanced Packaging related tasks
Senior Financial Analyst Applicants are expected to have a solid experience in handling Job related tasks
Director of AMS Design Engineering Applicants are expected to have a solid experience in handling Job related tasks
Analog Intern - PhD Applicants are expected to have a solid experience in handling Job related tasks
Analog Layout Intern - Bachelor's Degree Applicants are expected to have a solid experience in handling Job related tasks