Senior Staff Analog Mixed-Signal Design Engineer job opportunity at Marvell Technology, Inc..

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Marvell Technology, Inc. Senior Staff Analog Mixed-Signal Design Engineer
Experience: 5-years
Pattern: full-time
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loacation Chandler, AZ, United States Of America
loacation Chandler, AZ....United States Of America

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact CE AMS team supports high-speed transceiver product development in Marvell. What You Can Expect You will be working with multi-functional teams to deliver high-speed transceiver products. You will define specifications based on link budget, behavioral modeling, and transistor-level feasibility. You will also drive schematic design and collaborate on mask design for implementation. And finally, with the team, you will drive designs into volume production. What We're Looking For MS or PhD Degree in Electrical Engineering or related fields and 5+ years of relevant experience. The ideal candidate will have a deep understanding of analog mixed-signal design with experience in high-speed transceivers. Solid understanding and experience of designing analog mixed-signal circuit blocks including PLL, phase interpolator, low jitter clock distribution, bandgap, biasing circuits, LDO regulators, amplifiers, comparators, high-speed DACs and ADCs, filters. In-depth knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques. Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization. EXPERIENCE IN THE FOLLOWING AREAS IS DESIRABLE: Experience designing and verifying multi-GHz, high-resolution ADC architectures (pipeline, time-interleaved, SAR, or flash) in FinFET or other advanced process nodes. Understanding of system-level tradeoffs between speed, power, noise, and linearity in deeply scaled technologies. Familiar with mixed-signal integration, clocking, and layout considerations for high-speed data converters. Experience in lab testing of high-speed transceivers . Modeling of passive on-chip elements such as inductor, T-coil, and transformer. Able to build VerilogA/AMS behavioral models. Able to analyze and lead characterization data from lab and volume testing Knowledge of ESD requirements. Expected Base Pay Range (USD) 141,900 - 210,010, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements   At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com . Interview Integrity   As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.   Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-TD1

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