Senior Staff Engineer, Analog IC Design job opportunity at Marvell Technology, Inc..



bot
Marvell Technology, Inc. Senior Staff Engineer, Analog IC Design
Experience: 6-years
Pattern: full-time
apply Apply Now
Salary:
Status:

Analog IC Design

Copy Link Report
degreeOND
loacation Santa Clara, CA, United States Of America
loacation Santa Clara, C..........United States Of America

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact The Optical PHY (CE-AMS-OPHY) team designs high-speed and optical transceivers for communication infrastructure in long-haul, metro and datacenter. We address the bandwidth, capacity and power issues faced by cloud computing, mega data centers that powers the social media giant platforms. Our innovative approaches have resulted in the company’s products being first to market in many of key areas, developing the most advanced chips and subsystems solutions to address the ever-increasing demand of higher data rates driven by video-on demand, gaming and other real time data streams. We are seeking talented individuals to work on solving technical challenges with the most outstanding group of collaborators in the industry. Join our team of experts and make a difference in an exciting career opportunity. What You Can Expect As an Analog/Mixed-Signal IC Design Engineer, you will be part of a key team designing highly sophisticated CMOS transceiver/SERDES products.  Responsibilities would include implementation and verification of circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs etc. to meet key performance targets and performing design verification using industry standard tools such as Spectre, MATLAB etc. What We're Looking For ·Hands-on experience in designing mixed signal circuits including ADCs, DACs, RX, TX, PLLs, Filters, Bandgap bias circuits, regulators, and other analog circuits. ·Specialized depth and/or breadth of expertise. ·Ability to apply innovative solutions to resolve complex issues. ·History of identifying and developing best practices that deliver high-quality and effective solutions. ·Strong knowledge on the deep sub-micron CMOS technologies. ·Knowledge and experience on low power and high speed design techniques. ·Excellent problem solving and analytical skills. ·Strong knowledge on IC design CAD tools such as Spectre, Spice, Matlab, Hsim, Verilog, etc. ·Lab testing skills to evaluate the prototype unit to the design specification. · Completed a MS in Electrical Engineering with 6+ years of related experience or PhD degree with 3+ years of related experience in analog and mixed signal circuit design. Expected Base Pay Range (USD) 140,350 - 210,200, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements   At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com . Interview Integrity   As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.   Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-TD1

Other Ai Matches

Senior Principal Analog Mixed Signal IC Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Staff Phy Embedded Device Software Engineer Applicants are expected to have a solid experience in handling Job related tasks
Package Development, Signal Integrity and Power Integrity Engineer, Staff Applicants are expected to have a solid experience in handling Signal Integrity and Power Integrity Engineer, Staff related tasks
Senior Principal Technical Program Manager - AI Custom Silicon Solutions Applicants are expected to have a solid experience in handling Job related tasks
Optical Engineer, Senior Staff Applicants are expected to have a solid experience in handling Senior Staff related tasks
Regional IT Service Delivery Engineer (Staff Professional) Applicants are expected to have a solid experience in handling Job related tasks
Senior Engineer, Physical Design Applicants are expected to have a solid experience in handling Physical Design related tasks
Senior Staff Manager, Analog IC Design Applicants are expected to have a solid experience in handling Analog IC Design related tasks
Field Application Engineering, Principal Engineer Applicants are expected to have a solid experience in handling Principal Engineer related tasks
Director Analyst Relations Applicants are expected to have a solid experience in handling Job related tasks
Sr. Staff Analog Mixed-Signal Design Engineer - RF/TIA/SiGe/CMOS Applicants are expected to have a solid experience in handling Job related tasks
Physical Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Sales Operations/Cloud Business Manager Applicants are expected to have a solid experience in handling Job related tasks
Sr Staff Design Verification Engineer (DDR/LPDDR/HBM) Applicants are expected to have a solid experience in handling Job related tasks
Analog/Mixed-Signal IC & AI Systems R&D Intern - Master's Degree Applicants are expected to have a solid experience in handling Job related tasks
Engineering IP Program Manager, Sr. Principal Applicants are expected to have a solid experience in handling Sr. Principal related tasks
Architecture Validation (L2, L3, Python automation, Device modeling) Applicants are expected to have a solid experience in handling L3, Python automation, Device modeling) related tasks
Principal Engineer, Design Verification Applicants are expected to have a solid experience in handling Design Verification related tasks
Senior Staff Engineer - RTL ASIC Design Applicants are expected to have a solid experience in handling Job related tasks
Senior Silicon Validation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Design Verification Intern - Master's Degree Applicants are expected to have a solid experience in handling Job related tasks
Memory Layout Principal Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff Engineer - SerDes Digital Design Applicants are expected to have a solid experience in handling Job related tasks