Physical Design Engineer job opportunity at Marvell Technology, Inc..

Home Jobs In Argentina Tag: Job Physical Design Engineer position at Marvell Technology, Inc.


bot
Marvell Technology, Inc. Physical Design Engineer
Experience: 3-years
Pattern: full-time
Country:
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeOND
loacation Cordoba, Argentina, Argentina
loacation Cordoba, Argen..........Argentina

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact Built on decades of expertise and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance processor chips in a leading-edge CMOS process technology, targeted at server, 5G/6G, and networking applications. What You Can Expect Job Responsibilities You will work with a global team on both the physical design of complex chips as well as the methodology to enable an efficient and robust design process. Every day, you’ll be working hands-on to triage workflows, whether you’re running RTL code through synthesis and place and route (PnR) tools to create the physical view of the chip, analyzing performance by running timing analysis, verifying a robust power grid by performing EMIR analysis, etc. There are many sign-off checks that need to happen to verify that the database is ready to move on to the next level, and it’s your responsibility to review completed runs for errors or create optimizations from successful runs.   What We're Looking For To be successful in this role, you must: Have completed a Bachelor’s Degree in Electrical/Computer Engineering, Computer Science, or related fields and have 1-3 years of related professional experience OR a Master’s degree and/or PhD in Electrical/Computer Engineering, Computer Science, or related fields. In your coursework, you must have completed a digital logic course and projects that involved circuit design, testing, and timing analysis. Have academic or professional experience designing and testing logic blocks, then were able to analyze the quality of results and identify opportunities for improvement. Know formulas for timing analysis and concepts for synthesis and place and route. Enjoy learning by doing the work and having access to guides and a mentor. Be willing to raise your hand and volunteer for learning opportunities you may not have experienced before. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Interview Integrity   As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.   Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-MFBJ

Other Ai Matches

Senior Principal Analog Mixed Signal IC Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Staff Phy Embedded Device Software Engineer Applicants are expected to have a solid experience in handling Job related tasks
Package Development, Signal Integrity and Power Integrity Engineer, Staff Applicants are expected to have a solid experience in handling Signal Integrity and Power Integrity Engineer, Staff related tasks
Senior Principal Technical Program Manager - AI Custom Silicon Solutions Applicants are expected to have a solid experience in handling Job related tasks
Optical Engineer, Senior Staff Applicants are expected to have a solid experience in handling Senior Staff related tasks
Regional IT Service Delivery Engineer (Staff Professional) Applicants are expected to have a solid experience in handling Job related tasks
Senior Engineer, Physical Design Applicants are expected to have a solid experience in handling Physical Design related tasks
Senior Staff Manager, Analog IC Design Applicants are expected to have a solid experience in handling Analog IC Design related tasks
Field Application Engineering, Principal Engineer Applicants are expected to have a solid experience in handling Principal Engineer related tasks
Director Analyst Relations Applicants are expected to have a solid experience in handling Job related tasks
Sr. Staff Analog Mixed-Signal Design Engineer - RF/TIA/SiGe/CMOS Applicants are expected to have a solid experience in handling Job related tasks
Physical Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Sales Operations/Cloud Business Manager Applicants are expected to have a solid experience in handling Job related tasks
Sr Staff Design Verification Engineer (DDR/LPDDR/HBM) Applicants are expected to have a solid experience in handling Job related tasks
Analog/Mixed-Signal IC & AI Systems R&D Intern - Master's Degree Applicants are expected to have a solid experience in handling Job related tasks
Engineering IP Program Manager, Sr. Principal Applicants are expected to have a solid experience in handling Sr. Principal related tasks
Architecture Validation (L2, L3, Python automation, Device modeling) Applicants are expected to have a solid experience in handling L3, Python automation, Device modeling) related tasks
Principal Engineer, Design Verification Applicants are expected to have a solid experience in handling Design Verification related tasks
Senior Staff Engineer - RTL ASIC Design Applicants are expected to have a solid experience in handling Job related tasks
Senior Silicon Validation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Design Verification Intern - Master's Degree Applicants are expected to have a solid experience in handling Job related tasks
Memory Layout Principal Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff Engineer - SerDes Digital Design Applicants are expected to have a solid experience in handling Job related tasks