Design Verification Intern - Master's Degree job opportunity at Marvell Technology, Inc..

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Marvell Technology, Inc. Design Verification Intern - Master's Degree
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loacation Westborough, MA, United States Of America
loacation Westborough, M..........United States Of America

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact Custom Cloud Solutions (CCS) is a key business unit within Marvell's Data Center Group (DCG), focused on delivering tailored solutions for AI and cloud data centers to enhance performance and efficiency. CCS group develops cutting-edge SOCs and processors in advanced process nodes for some of the largest companies in the world, focusing on the growing data center, enterprise, and wireless markets. As part of the CCS group at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers’ specifications whether they’re a major telecom organization or automotive company, etc. What You Can Expect In this in-office role in Westborough, MA, you’ll work day-to-day with an RTL engineer to verify their design. Their design is in Verilog; you’ll use System Verilog to debug. You’ll run simulations using Synopsys VCS or a similar program, and then debug as needed until the design meets required specifications. You’ll also work closely with DFT engineers who are working in parallel on your blocks. You’ll attend weekly staff meetings to go over what everyone is working on and update your progress or address any issues. As you take responsibility for larger blocks, you may have to present to a review committee and explain your test plan and test schedule for those larger blocks. What We're Looking For To be successful in this role you must: - Be currently pursuing your Bachelor's or Master's degree in Electrical Engineering or related field. - Your coursework must have included some logic design, Verilog or VHDL, basic circuits, and computer architecture. You should have a focus in VLSI or show projects in your courses that directly relate to chip design. - You have used a tool like Synopsys, Cadence, or Mentor to run simulations and you can write and debug a testbench. - Be comfortable working in a Linux environment and doing scripting with Python. - Be extremely detail-oriented and ready to iterate a design over and over again until it is refined completely. - Work and communicate well with your team, keeping them in the loop about your progress, issues you encounter, and any deviations from the planned schedule. Expected Base Pay Range (USD) 30 - 59, $ per hour. The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements   For Internship roles, we are proud to offer the following benefits package during the internship - medical, dental and vision coverage, perks and discount programs, wellness & mental health support including coaching and therapy, paid holidays, paid volunteer days and paid sick time. Additional compensation may be available for intern PhD candidates. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com . Interview Integrity   As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.   Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-TT1

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