Design Verification, Manager job opportunity at Marvell Technology, Inc..



bot
Marvell Technology, Inc. Design Verification, Manager
Experience: General
Pattern: full-time
apply Apply Now
Salary:
Status:

Manager

Copy Link Report
degreeOND
loacation Ho Chi Minh, Vietnam
loacation Ho Chi Minh....Vietnam

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact As part of the Design Verification Team at Marvell, you will verify all of the circuitry that goes inside our chips for innovative storage technologies, including ultra‐fast read channels, high‐performance processors, leading edge transceivers, highly efficient analog designs, and powerful cryptographic engines. These solutions address all segments of the hard disk drive (HDD) and solid‐state drive (SSD) electronics markets. Many of the same technologies have been utilized in Marvell storage system solutions products, powering PCs, servers, cloud, and enterprise systems. What You Can Expect As a Design Verification Manager, you will play a pivotal role not only as a people manager but also as a technical leader. You will lead a team responsible for developing storage and security IPs. Your responsibilities include: Managing and growing the team in both headcount and technical capabilities. Acting as a technical expert and design verification lead for connectivity products. Driving execution and innovation in verification methodologies and practice. What We're Looking For Proven experience in design verification for complex SoCs or IPs. Strong hands-on expertise in UVM, SystemVerilog, and modern verification methodologies. Demonstrated success in leading and mentoring engineering teams. Excellent communication skills in English – both written and verbal. Ability to collaborate effectively across global teams and deliver results in a fast-paced environment. Strong self-motivation and ownership mindset Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Interview Integrity  To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-UN1

Other Ai Matches

Principal Analog Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff ASIC Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Staff/ Senior Staff QA Engineer (Storage, CXL, PCIE) Applicants are expected to have a solid experience in handling CXL, PCIE) related tasks
Design Verification Senior Principal Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff Engineer, Physical Design Applicants are expected to have a solid experience in handling Physical Design related tasks
AI Development Intern Applicants are expected to have a solid experience in handling Job related tasks
Senior Physical Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Principal Technical Program Manager - AI Custom Silicon Solutions Applicants are expected to have a solid experience in handling Job related tasks
Advanced Packaging SI/PI Staff Engineer Applicants are expected to have a solid experience in handling Job related tasks
Principal Signal Integrity Engineer Applicants are expected to have a solid experience in handling Job related tasks
Staff Applications Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Engineer, Physical Design Applicants are expected to have a solid experience in handling Physical Design related tasks
SYN/STA Engineer Intern (CCS) Applicants are expected to have a solid experience in handling Job related tasks
Staff Analog Layout Engineer Applicants are expected to have a solid experience in handling Job related tasks
Software Engineer Intern - Bachelor's Degree Applicants are expected to have a solid experience in handling Job related tasks
Analog Layout Staff Engineer Applicants are expected to have a solid experience in handling Job related tasks
Analog IC Design Engineer Intern Applicants are expected to have a solid experience in handling Job related tasks
System Design and Silicon Validation Intern (Connectivity) Applicants are expected to have a solid experience in handling Job related tasks
Principal Product Engineer Applicants are expected to have a solid experience in handling Job related tasks
CAD Engineer, AI Based Automation Development Applicants are expected to have a solid experience in handling AI Based Automation Development related tasks
Silicon Photonics Engineer Applicants are expected to have a solid experience in handling Job related tasks
Hardware Validation (Test Solutions) Engineer Applicants are expected to have a solid experience in handling Job related tasks
Principal Engineer Physical Design Applicants are expected to have a solid experience in handling Job related tasks