Principal Applications Engineer job opportunity at Marvell Technology, Inc..



bot
Marvell Technology, Inc. Principal Applications Engineer
Experience: 8-years
Pattern: full-time
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeOND
loacation Santa Clara, CA, United States Of America
loacation Santa Clara, C..........United States Of America

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact Marvell Technology is seeking a highly skilled and experienced Principal Applications Engineer specializing in SerDes IP DSP algorithms and mixed-signal circuit design. This role is critical in driving the successful integration and application of Marvell’s SerDes IP across various customer platforms. The ideal candidate will have a deep understanding of high-speed serial interface technologies and a strong background in digital signal processing (DSP) algorithms, mixed-signal circuit design, bench debug, system application and customer support. What You Can Expect Customer Engagement: Work closely with customers to understand their technical requirements and provide expert guidance on the integration of Marvell's SerDes IP into their systems. Technical Support: Provide hands-on technical support during the design, development, and deployment phases, ensuring successful implementation of SerDes IP solutions. Design Optimization: Collaborate with internal design teams to optimize SerDes IP performance, focusing on DSP algorithms and mixed-signal circuit components to meet stringent performance and reliability standards. Problem Solving: Lead troubleshooting efforts for complex technical issues related to SerDes IP, leveraging deep expertise in both DSP algorithms and mixed-signal design. Documentation & Training: Create and maintain comprehensive technical documentation and conduct training sessions for customers and internal teams on SerDes IP features and best practices. Cross-Functional Collaboration: Work with cross-functional teams, including product management, design engineering, and quality assurance, to ensure alignment of product capabilities with customer needs. Customer Engagement: Work closely with customers to understand their technical requirements and provide expert guidance on the integration of Marvell's SerDes IP into their systems. Technical Support: Provide hands-on technical support during the design, development, and deployment phases, ensuring successful implementation of SerDes IP solutions. Design Optimization: Collaborate with internal design teams to optimize SerDes IP performance, focusing on DSP algorithms and mixed-signal circuit components to meet stringent performance and reliability standards. Problem Solving: Lead troubleshooting efforts for complex technical issues related to SerDes IP, leveraging deep expertise in both DSP algorithms and mixed-signal design. Documentation & Training: Create and maintain comprehensive technical documentation and conduct training sessions for customers and internal teams on SerDes IP features and best practices. Cross-Functional Collaboration: Work with cross-functional teams, including product management, design engineering, and quality assurance, to ensure alignment of product capabilities with customer needs. What We're Looking For Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field. Ph.D. is a plus. Experience: 8+ years of relevant experience in SerDes IP, DSP algorithm development, and mixed-signal circuit design. Technical Skills: Strong expertise in SerDes IP and high-speed serial communication protocols (e.g., PCIe, Ethernet, SATA). Proficient in DSP algorithm design and implementation, including equalization, filtering, and error correction. Extensive experience with mixed-signal circuit design, including PLLs, ADCs, DACs, and high-speed analog front-ends. Familiarity with EDA tools for mixed-signal design and verification (e.g., Cadence, Synopsys). Experience with lab equipment for signal integrity analysis and debugging (e.g., oscilloscopes, spectrum analyzers). Experience in creating and performing validation test cases/scripts and generating reports. Expertise in Ethernet and PCIe protocol system design and application. Proficient in Ethernet and PCIe electrical compliance test measurements. Soft Skills: Excellent problem-solving skills with a proactive and hands-on approach. Strong communication and interpersonal skills, with the ability to convey complex technical concepts to diverse audiences. Ability to work effectively in a fast-paced, collaborative environment. Expected Base Pay Range (USD) 143,200 - 214,500, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements   Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com . Interview Integrity  To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-TT1

Other Ai Matches

Demand Planning Analyst Intern - Bachelor's Degree Applicants are expected to have a solid experience in handling Job related tasks
Principal Hardware Engineer, Optics Applicants are expected to have a solid experience in handling Optics related tasks
Staff Validation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Principal Engineer, Analog IC Design Applicants are expected to have a solid experience in handling Analog IC Design related tasks
Principal/Staff Engineer, DFT Engineering Applicants are expected to have a solid experience in handling DFT Engineering related tasks
SEV Validation Senior Staff Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Director Information Technology Applicants are expected to have a solid experience in handling Job related tasks
Analog IC Design Intern (COMPHY) Applicants are expected to have a solid experience in handling Job related tasks
Staff Engineer, Analog Layout Applicants are expected to have a solid experience in handling Analog Layout related tasks
System Engineer Intern (Optical DSP) - Master's Degree Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff Engineer - SerDes Digital Design Applicants are expected to have a solid experience in handling Job related tasks
Staff Engineer- Analog Design Applicants are expected to have a solid experience in handling Job related tasks
Design Verification (Senior to Staff Engineer) Applicants are expected to have a solid experience in handling Job related tasks
Analog Layout Staff Engineer Applicants are expected to have a solid experience in handling Job related tasks
Analog Layout Intern - Bachelor's Degree Applicants are expected to have a solid experience in handling Job related tasks
Senior Principal Applications Engineering - Network Validation Applicants are expected to have a solid experience in handling Job related tasks
System Engineer - Optical DSP Intern - PhD Applicants are expected to have a solid experience in handling Job related tasks
SERDES Validation Director Applicants are expected to have a solid experience in handling Job related tasks
Design Verification - Manager Applicants are expected to have a solid experience in handling Job related tasks
Staff Engineer, Quality Assurance (Cryptography, Cloud HSM, C/Python automation, KMS) Applicants are expected to have a solid experience in handling Quality Assurance (Cryptography, Cloud HSM, C/Python automation, KMS) related tasks
Hardware Validation Intern - Master's Degree Applicants are expected to have a solid experience in handling Job related tasks
Signal Integrity Engineer Intern (Cloud Platform Optics) - Master's Degree Applicants are expected to have a solid experience in handling Job related tasks
Senior Staff Engineer, Optical Applicants are expected to have a solid experience in handling Optical related tasks