Director of Product Diagnostic Tools and Engineering job opportunity at Altera Corporation.

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Altera Corporation Director of Product Diagnostic Tools and Engineering
Experience: 12-years
Pattern: full-time
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loacation San Jose, California, United States, United States Of America
loacation San Jose, Cali..........United States Of America

Job Details: Job Description: About Altera Altera is a global leader in FPGA and programmable logic technologies, enabling innovation in data center, communications, automotive, aerospace, industrial, and defense markets. As we grow and scale our product portfolio, we are expanding our engineering capabilities to ensure world-class silicon quality, faster yield ramp, and exceptional customer success. Role Summary We are seeking a highly experienced and visionary Director of Product Diagnostic Tools Engineering to define and lead the diagnostic strategy for Altera’s advanced FPGA and SoC products. This role is accountable for driving the development of diagnostic architectures, tools, content, and automation that accelerate silicon bring-up, enable robust production test coverage, optimize yield, and enhance failure isolation throughout product lifecycle. This leader will collaborate closely with Design, DFT, Test Engineering, Firmware, Customer Operations, OSAT, and Product Engineering teams—ensuring scalable diagnostics that support both engineering and high-volume manufacturing environments. Key Responsibilities Lead a global team of engineers focused on diagnostic tool development, fault coverage optimization, characterization workflows, and debug enablement for FPGA/SoC product families. Own the long-term strategy, roadmap, and architecture for diagnostic tooling used from pre-silicon through production and field operation. Drive continuous improvement in diagnostic methodologies to improve yield ramp speed, reduce escape rates, and minimize production test cost. Oversee development of software-based test content, debug utilities, and analytics automation to shorten silicon validation cycles. Ensure scalability and seamless integration of diagnostics across lab, ATE, system-level test, OSAT, and customer environments. Partner with Design and DFT teams to influence architectural decisions that enhance testability and error detection. Lead root-cause isolation for complex functional, performance, and reliability issues across the product lifecycle. Establish operational metrics/KPIs for diagnostic performance and drive action plans for systemic improvements. Build and mentor high-performing engineering talent—developing leaders, fostering technical excellence, and supporting career growth. Provide clear technical communication, decision-making support, and execution updates to senior management and cross-functional leadership teams. Salary Range     The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences , trainings , etc. We also offer incentive opportunities that reward employees based on individual and company performance.    $178,900 - $259,000 USD Qualifications: Minimum Requirements: Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline; Master’s or PhD strongly preferred. 12+ years of semiconductor industry experience in product engineering, silicon debug, production test, DFT/diagnostics, or related domains—including 5+ years in organizational leadership roles. Deep understanding of test and debug methodologies including scan, BIST, system-level diagnostics, structural and functional test coverage. Demonstrated experience enabling diagnostics into high-volume manufacturing flows (ATE, board test, OSAT environments). Proven track record delivering scalable tools or platforms that improve yield, test efficiency, and customer quality outcomes. Excellent problem-solving abilities with strong analytical, communication, and stakeholder partnership skills. Preferred Qualifications: Expertise with FPGA architectures, high-complexity SoC designs, embedded systems, and on-chip instrumentation. Experience supporting advanced technology nodes, high-performance packaging, and reliability requirements. Familiarity with silicon analytics, fault classification automation, accelerated debug methodologies, and ML-assisted test. Demonstrated success developing engineering leaders and fostering inclusive, collaborative teams. Job Type: Regular Shift: Shift 1 (United States of America) Primary Location: San Jose, California, United States Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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