Analog Layout Design Engineer job opportunity at Altera Corporation.



bot
Altera Corporation Analog Layout Design Engineer
Experience: 8-years
Pattern: full-time
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeOND
loacation Penang 15, Penang, Malaysia, Malaysia
loacation Penang 15, Pen..........Malaysia

Job Details: Job Description: About the Role We are seeking a highly skilled Analog Layout Design Engineer to join our dynamic team. The successful candidate will be responsible for leading the FPGA physical design and layout of complex digital, analog and mixed-signal integrated circuits (ICs), ensuring optimal performance, reliability, and manufacturability. Key Responsibilities Lead and execute layout design of digital. analog and mixed-signal circuit. Collaborate closely with circuit designers to understand requirements, constraints, and performance targets. Plan and manage layout schedules, resources, and deliverables, ensuring timely completion of projects. Perform floorplanning, placement, and routing while optimizing for area, performance, and manufacturability. Conduct thorough physical verification such as DRC, LVS, ERC including RV. Drive design reviews and provide technical mentorship to junior layout engineers. Interface with foundry partners to ensure compliance with process design rules and manufacturing best practices. Document design methodology and maintain layout guidelines for future projects. Qualifications: Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or related field. 8+ years of experience in analog/mixed-signal IC layout design. Expert proficiency with industry-standard EDA tools (e.g., Cadence Virtuoso, Mentor Graphics). Deep understanding of analog circuit topologies and their layout sensitivities (matching, parasitics, noise, shielding, etc.). Strong problem-solving skills and attention to detail. Excellent communication skills and ability to work collaboratively in a cross-functional environment. Experience mentoring and leading layout teams is a plus. Job Type: Regular Shift: Shift 1 (Malaysia) Primary Location: Penang 15, Penang, Malaysia Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Other Ai Matches

SOC/FPGA Silicon Design Verification Engineer Applicants are expected to have a solid experience in handling Job related tasks
R&D Financial Specialist Applicants are expected to have a solid experience in handling Job related tasks
Full Stack Web Application Developer Applicants are expected to have a solid experience in handling Job related tasks
Cost Management Product Owner Applicants are expected to have a solid experience in handling Job related tasks
Principal FPGA Compiler Software Engineer Applicants are expected to have a solid experience in handling Job related tasks
FPGA (High Level Design) Software Validation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Technical Accounting Manager Applicants are expected to have a solid experience in handling Job related tasks
Design Verification Engineer Applicants are expected to have a solid experience in handling Job related tasks
Workday Contractor Applicants are expected to have a solid experience in handling Job related tasks
Infra and DevOps Engineer Applicants are expected to have a solid experience in handling Job related tasks
Intern Admin Applicants are expected to have a solid experience in handling Job related tasks
Product Quality and Reliability Engineer Applicants are expected to have a solid experience in handling Job related tasks
remote-jobserver Remote
Sales Applications Engineer Applicants are expected to have a solid experience in handling Job related tasks
Software Engineer (Python) for Jira Integration Applicants are expected to have a solid experience in handling Job related tasks
Senior Design Automation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Sales Service Representative Applicants are expected to have a solid experience in handling Job related tasks
Staff DFT Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Sales Service Representative Applicants are expected to have a solid experience in handling Job related tasks
Internal Sales Representative Applicants are expected to have a solid experience in handling Job related tasks
Senior Business Analyst - Record to Report Applicants are expected to have a solid experience in handling Job related tasks
FGPA IP Software Development Engineer Applicants are expected to have a solid experience in handling Job related tasks
remote-jobserver Remote
FPGA Circuit Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
FPGA IP Software Development Engineer Applicants are expected to have a solid experience in handling Job related tasks