Machine Learning Engineer job opportunity at Altera Corporation.



bot
Altera Corporation Machine Learning Engineer
Experience: General
Pattern: full-time
apply Apply Now
Salary:
Status:

Job

Copy Link Report
degreeOND
loacation San Jose, California, United States, United States Of America
loacation San Jose, Cali..........United States Of America

Job Details: Job Description: Altera is a global leader in programmable logic solutions, delivering high   p erformance FPGA technology that powers next   g eneration cloud, networking, and edge applications. With a renewed focus on agility, software   f irst usability, and   hardware   accelerated   innovation, Altera is shaping the future of computing. Join us as we build the next wave of   AI optimized   FPGA platforms and tools! About the Role   We are seeking a Machine Learning Engineer to help drive the development,   optimization   and deployment   of Altera FPGA Compiler . In this role, you will work at the intersection of   machine learnin g   and compiler/toolchain development , enabling customers to achieve breakthrough performance and efficiency on programmable logic.   You will collaborate closely with hardware architects, software engineers, and IP developers to design ML models,   optimize   inference pipelines, and contribute to the evolution of Altera’s FPGA   Compiler .   Key Responsibilities   Develop,   optimize , and deploy advanced machine learning technologies to enhance FPGA compiler performance,   focusing   on timing closure, resource   utilization , and power efficiency.   Evaluate and integrate emerging ML models (e.g., graph neural networks, reinforcement learning) and frameworks (e.g.,   PyTorch , TensorFlow) for compiler optimization tasks like placement, routing, and logic synthesis.   Build robust tools, scripts, and CI/CD workflows to automate model conversion, quantization, pruning, and deployment within the FPGA design flow, ensuring compatibility with EDA tools like Quartus.   Collaborate with customers, FPGA architects, and internal engineering teams to gather ML requirements, define success metrics, and deliver tailored, production-ready solutions.   Design and execute comprehensive benchmarks to measure ML-optimized compiler performance across diverse FPGA families (e.g.,   Agilex , Stratix), analyzing metrics such as compile time,   QoR , and scalability.   Salary Range     The pay range below is for Bay Area California only. Actual salary may vary based on   a number of   factors including job location, job-related knowledge, skills, experiences,   trainings , etc. We also offer incentive opportunities that reward employees based on individual and company performance.    $ 200.4K   - $ 290.1K   USD     We use artificial intelligence to screen, assess, or select applicants for the position.   Applicants must be eligible for any required U.S. export authorizations .   Qualifications: Minimum Qualifications   Bachelor’s   D egree or higher in Computer Science, Electrical Engineering, or a related field. 10 +   years of experience in machine learning development, model   optimization   or ML systems engineering.   Experience with C++ and Python in production or research environments. Preferred Qualifications   Experience with Agile methodologies, GitHub Copilot or similar AI coding assistants, and high-performance computing environments. Familiarity with edge AI inference on FPGAs and neuro-symbolic AI techniques.   Strong communication   skills for cross-functional collaboration and presenting results at conferences like DAC or FPGA World. Job Type: Regular Shift: Shift 1 (United States of America) Primary Location: San Jose, California, United States Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Other Ai Matches

Silicon Validation and Tool Development Engineer Applicants are expected to have a solid experience in handling Job related tasks
remote-jobserver Remote
FPGA Circuit Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
Pricing Manager - Penang Applicants are expected to have a solid experience in handling Job related tasks
AI Engineer for Manufacturing/Quality Applicants are expected to have a solid experience in handling Job related tasks
FPGA IP Software Development Engineer Applicants are expected to have a solid experience in handling Job related tasks
Silicon Design Engineering Sr Manager Applicants are expected to have a solid experience in handling Job related tasks
Senior Business Analyst - Invoice to Cash Applicants are expected to have a solid experience in handling Job related tasks
IP verification Engineer Applicants are expected to have a solid experience in handling Job related tasks
Physical Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
remote-jobserver Remote
Field Sales Engineer Applicants are expected to have a solid experience in handling Job related tasks
Cost Management Product Owner Applicants are expected to have a solid experience in handling Job related tasks
Cloud Systems and Solutions Engineer Applicants are expected to have a solid experience in handling Job related tasks
Sr Boomi Integration Analyst Applicants are expected to have a solid experience in handling Job related tasks
Physical Verification Design Methodology and Automation Engineer Applicants are expected to have a solid experience in handling Job related tasks
Analog Layout Design Engineer Applicants are expected to have a solid experience in handling Job related tasks
FPGA Compiler Timing Engine Software Manager Applicants are expected to have a solid experience in handling Job related tasks
Senior Static Timing/STA/Clocking Engineer Applicants are expected to have a solid experience in handling Job related tasks
Senior Business Analyst - Record to Report Applicants are expected to have a solid experience in handling Job related tasks
Timing Engineer/Lead Applicants are expected to have a solid experience in handling Job related tasks
High Level Synthesis Compiler Engineer Applicants are expected to have a solid experience in handling Job related tasks
RTL Design Lead Hardware Engineer Applicants are expected to have a solid experience in handling Job related tasks
remote-jobserver Remote
Field Applications Engineer (FAE) Applicants are expected to have a solid experience in handling Job related tasks
FPGA Silicon Design Engineer Applicants are expected to have a solid experience in handling Job related tasks