ASIC/SOC DFT Engineer (Silicon Engineering) job opportunity at SpaceX.

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SpaceX ASIC/SOC DFT Engineer (Silicon Engineering)
Experience: 1-year
Pattern: full-time
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Engineering

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degreeBachelor's (B.Sc.)
loacation Sunnyvale, CA, United States Of America
loacation Sunnyvale, CA....United States Of America

We are seeking a motivated, proactive, and intellectually curious #engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, #architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. __ These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the #Starlink network. Responsible for evaluating design readiness for scan insertion through RTL and physical design Scan Design Rule Check (DRC) tools. __ Integration and verification of #Design for Test (DFT) fabrics and IP within Subsystems. Running and evaluating scan insertion through synthesis tools and refining scan insertion recipe for maximum coverage. __ Run ATPG(Automatic Test Pattern Generation) #analysis to ensure quality scan chain construction and meeting basic coverage goals. Run and debug non-timing and SDF annotated gate level simulations. Creating ATPG content for use in post-silicon testing and validating that content through gate level simulation.

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